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HN27C101AP/AFP/ATT Series HN27C301AP/AFP Series
131072-word ! 8-bit CMOS One Time Electrically Programmable ROM The HN27C101AP/AFP/ATT series are 131072word ! 8-bit one time electrically programmable ROM. Initially, all bits of the HN27C101AP/AFP/ATT, HN27C301AP /AFP series are in the "1" state (output high). Data is introduced by selectively programming "0" into the desired bit location. This device is packaged in 32-pin plastic package, therefore, this device cannot be rewritten and erased. The packages of the HN27C101ATT series are surface mount thin and small outline packages. They are suitable for hand-held equipment such as a memory card.
Ordering Information
Type No. HN27C101AP-12 HN27C101AP-15 HN27C101AP-20 HN27C101AP-25 HN27C301AP-12 HN27C301AP-15 HN27C301AP-20 Access time 120 ns 150 ns 200 ns 250 ns 120 ns 150 ns 200 ns 250 ns 120 ns 150 ns 200 ns 250 ns 120 ns 150 ns 200 ns 250 ns 120 ns 150ns 32-pin plastic (TTP-32D) 32-pin plastic (FP-32D) Package 600-mil plastic DIP
---------------------------------------- -------------------------- 32-pin -------------------------- (DP-32) -------------------------- -------------------------- -------------------------- -------------------------- --------------------------
HN27C301AP-25
Features
* Single power supply: +5 V 10% * Fast high-reliability programming mode and fast high-reliability page programming mode - Programming voltage: +12.5 V DC - Fast high-reliability page programming: 14 sec typ * High speed inputs and outputs TTL compatible during both read and program modes * Low power dissipation: 50 mW/MHz typ (active) 5 W typ (standby) * Pin arrangement:32-pin JEDEC standard except HN27C301A series replaceable 32 pin Mask ROM (HN27C301AP/AFP Series) * Package - Surface mount thin and small outline package (TSOP) type II: HN27C101ATT series * Device identifier mode: manufacturer code and device code * Fully compatible with HN27C101P/FP, 301P/FP series
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HN27C101AFP-12 HN27C101AFP-15 HN27C101AFP-20 HN27C101AFP-25 HN27C301AFP-12 HN27C301AFP-15 HN27C301AFP-20 HN27C301AFP-25 HN27C101ATT-12 HN27C101ATT-15
-------------------------- SOP -------------------------- -------------------------- -------------------------- -------------------------- -------------------------- -------------------------- ---------------------------------------- -------------------------- TSOP-(II) ----------------------------------------
1
HN27C101AP/AFP/ATT, HN27C301AP/AFP Series
Pin Arrangement
HN27C101AP/AFP Series V PP A16 A15 A12 A7 A6 A5 A4 A3 A2 A1 A0 I/O0 I/O1 I/O2 VSS 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 (Top View) HN27C101ATT Series V PP A16 A15 A12 A7 A6 A5 A4 A3 A2 A1 A0 I/O0 I/O1 I/O2 VSS 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 (Top View) 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 V CC PGM NC A14 A13 A8 A9 A11 OE A10 CE I/O7 I/O6 I/O5 I/O4 I/O3 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 V CC PGM NC A14 A13 A8 A9 A11 OE A10 CE I/O7 I/O6 I/O5 I/O4 I/O3 HN27C301AP/AFP Series V PP OE A15 A12 A7 A6 A5 A4 A3 A2 A1 A0 I/O0 I/O1 I/O2 VSS 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 (Top View) 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 V CC PGM NC A14 A13 A8 A9 A11 A16 A10 CE I/O7 I/O6 I/O5 I/O4 I/O3
Pin Description
Pin name A0 - A16 I/O0 - I/O7 CE OE VCC VPP VSS PGM NC Function Address Input/output Chip enable Output enable Power supply Programming power supply Ground Programming enable No connection
----------------------------------------- ----------------------------------------- ----------------------------------------- ----------------------------------------- ----------------------------------------- ----------------------------------------- ----------------------------------------- ----------------------------------------- ----------------------------------------- -----------------------------------------
2
HN27C101AP/AFP/ATT, HN27C301AP/AFP Series
Block Diagram
A5 A9 A12 A16 X-Decoder 1024 x 1024 Memory Matrix
I/O0 I/O7
Input Data Control
Y-Gating Y-Decoder
CE OE PGM VCC VPP VSS H H : High Threshold Inverter A0 - A4 A10, A11
3
HN27C101AP/AFP/ATT, HN27C301AP/AFP Series
Mode Selection
Mode HN27C101A HN27C301A Read Output disable Standby Program Program verify Page data latch Page program Program inhibit CE (22) (22) VIL VIL VIH VIL VIL VIH VIH VIL VIL VIH VIH Identifier VIL OE (24) (2) VIL VIH ! VIH VIL VIL VIH VIL VIH VIL VIH VIL PGM (31) (31) VIH VIH ! VIL VIH VIH VIL VIL VIH VIL VIH VIH VH VCC VCC Code A9 (26) (26) ! ! ! ! ! ! ! ! VPP (1) (1) VCC VCC VCC VPP VPP VPP VPP VPP VCC (32) (32) VCC VCC VCC VCC VCC VCC VCC VCC I/O (13 - 15, 17 - 21) (13 - 15, 17 - 21) Dout High-Z High-Z Din Dout Din High-Z High-Z
-------------------------------------------------------------------------------------- -------------------------------------------------------------------------------------- -------------------------------------------------------------------------------------- -------------------------------------------------------------------------------------- -------------------------------------------------------------------------------------- -------------------------------------------------------------------------------------- -------------------------------------------------------------------------------------- -------------------------------------------------------------------------------------- -------------------------------------------------------------------------------------- -------------------------------------------------------------------------------------- ---------------------- ---------------------- ---------------------- -------------------------------------------------------------------------------------- --------------------------------------------------------------------------------------
Notes: 1. !: Don't care 2. VH: 12.0 V 0.5 V
Absolute Maximum Ratings
Parameter A11 input and output voltages*1 A9 input voltage*1 VPP voltage*1 Symbol Vin, Vout VID VPP VCC Topr Value -0.6*2 to +7.0 -0.6*2 to +13.5 -0.6 to +13.5 -0.6 to +7.0 0 to +70 Unit V V V V C
-------------------------------------------------------------------------------------- -------------------------------------------------------------------------------------- -------------------------------------------------------------------------------------- --------------------------------------------------------------------------------------
VCC voltage*1
--------------------------------------------------------------------------------------
Operating temperature range Storage temperature range
--------------------------------------------------------------------------------------
Tstg -55 to +125 -10 to +80 C
--------------------------------------------------------------------------------------
Storage temperature range under bias Tbias C
--------------------------------------------------------------------------------------
Notes: 1. Relative to VSS 2. Vin, Vout and VID min = -1.0 V for pulse width 50 ns
4
HN27C101AP/AFP/ATT, HN27C301AP/AFP Series
Capacitance (Ta = 25C, f = 1 MHz)
Parameter Input capacitance Output capacitance Symbol Cin Cout Min -- -- Typ -- -- Max 10 15 Unit pF pF Test conditions Vin = 0 V Vout = 0 V
------------------------------------------------------------------------------------ ------------------------------------------------------------------------------------ ------------------------------------------------------------------------------------
Read Operation
DC Characteristics (VCC = 5 V 10%, VPP = VCC, Ta = 0 to +70C)
Parameter Input leakage current Output leakage current VPP current Standby VCC current Symbol ILI ILO IPP1 ISB1 ISB2 Operating VCC current ICC1 ICC2 Min -- -- -- -- -- -- -- -- Input low voltage Input high voltage Output low voltage Output high voltage VIL VIH VOL VOH -0.3*1 2.2 -- 2.4 Typ -- -- 1 -- 1 -- -- -- -- -- -- -- Max 2 2 20 1 20 30 30 45 0.8 Unit A A A mA mA mA mA mA V Test conditions Vin = 0 V to VCC Vout = 0 V to VCC VPP = 5.5 V CE = VIH CE = VCC 0.3 V CE = VIL, Iout = 0 mA f = 5 MHz, Iout = 0 mA f = 8.4 MHz, Iout = 0 mA
------------------------------------------------------------------------------------ ------------------------------------------------------------------------------------ ------------------------------------------------------------------------------------ ------------------------------------------------------------------------------------ -------------------------------------------------------------- ------------------------------------------------------------------------------------ -------------------------------------------------------------- ------------------------------------------------------ ------------------------------------------------------------------------------------ ------------------------------------------------------------------------------------
VCC + 1.0*2 V 0.45 -- -- V V V IOL = 2.1 mA IOH = -1 mA IOH = -0.1 mA
------------------------------------------------------------------------------------ ------------------------------------------------------------------------------------ -----------------------------------------------------
VCC - 0.7 --
------------------------------------------------------------------------------------
Notes: 1. VIL min = -1.0 V for pulse width 50 ns. 2. VIH max = VCC +1.5 V for pulse width 20 ns. If VIH is over the specified maximum value, read operation cannot be guaranteed.
5
HN27C101AP/AFP/ATT, HN27C301AP/AFP Series
AC Characteristics (VCC = 5 V 10%, VPP = VCC, Ta = 0 to +70C) Test condition * * * * Input pulse levels: 0.45 V to 2.4 V Input rise and fall times: 20 ns Output load: 1 TTL Gate +100 pF Reference levels for measuring timing: Inputs; 0.8 V and 2.0 V Outputs; 0.8 V and 2.0 V
HN27C101AP /AFP/ATT HN27C301AP/AFP ------------------- -12 -15 --------- --------- Min Max Min Max -- -- -- 0 0 120 120 60 50 -- -- -- -- 0 0 150 150 70 50 --
Parameter Address to output delay CE to output delay OE to output delay OE high to output float Address to output hold
Symbol tACC
HN27C101AP/AFP HN27C301AP/AFP ------------------- -20 -25 --------- --------- Min Max Min Max Unit -- -- -- 0 0 200 200 70 50 -- -- -- -- 0 0 250 250 100 60 -- ns ns ns ns ns
Test conditions CE = OE = VIL OE = VIL CE = VIL CE = VIL
------------------------------------------------------------------------------------ ------------------------------------------------------------------------------------ ------------------------------------------------------------------------------------ ------------------------------------------------------------------------------------ ------------------------------------------------------------------------------------ ------------------------------------------------------------------------------------
Note: tDF is defined as the time at which the output achieves the open circuit condition and data is no longer driven. tOH CE = OE = VIL tDF tOE tCE
Read Timing Waveform
Address
CE
Standby Mode tCE
Active Mode
Standby Mode
OE tOE tACC Data Out Data Out Valid tOH tDF
6
HN27C101AP/AFP/ATT, HN27C301AP/AFP Series
Fast High-Reliability Programming
This device can be applied the programming algorithm shown in following flowchart. This algorithm allows to obtain faster programming time without any voltage stress to the device nor deterioration in reliability of programmed data.
START SET PROG./VERIFY MODE VPP = 12.5 0.3 V, VCC = 6.0 0.25 V Address = 0 n=0 n+1 n
Program tPW = 0.2 ms 5% Address + 1 Address VERIFY NOGO NO
GO Program tOPW = 0.2n ms NO LAST Address?
n = 25 YES
YES SET READ MODE VCC = 5.0 V 0.25 V, VPP = VCC READ All Address GO END FAIL NOGO
Fast High-Reliability Programming Flowchart
7
HN27C101AP/AFP/ATT, HN27C301AP/AFP Series
DC Characteristics (Ta = 25C 5C, VCC = 6 V 0.25 V, VPP = 12.5 V 0.3 V)
Parameter Input leakage current VPP supply current Operating VCC current Input low level Input high level Output low voltage during verify Output high voltage during verify Symbol ILI IPP ICC VIL VIH VOL VOH Min -- -- -- -0.1*5 2.2 -- 2.4 Typ -- -- -- -- -- -- -- Max 2 40 30 0.8 VCC + 0.5*6 0.45 -- Unit A mA mA V V V V IOL = 2.1 mA IOH = -400 A Test conditions Vin = 0 V to VCC CE = PGM = VIL
------------------------------------------------------------------------------------ ------------------------------------------------------------------------------------ ------------------------------------------------------------------------------------ ------------------------------------------------------------------------------------ ------------------------------------------------------------------------------------ ------------------------------------------------------------------------------------ ------------------------------------------------------------------------------------ ------------------------------------------------------------------------------------
Notes: 1. VCC must be applied simultaneously or before VPP and removed simultaneously or after VPP. 2. VPP must not exceed 13.5 V including overshoot. 3. An influence may be had upon device reliability if the device is installed or removed while VPP = 12.5 V. 4. Do not alter VPP either VIL to 12.5 V or 12.5 V to VIL when CE = Low. 5. VIL min = -0.6 V for pulse width 20 ns. 6. If VIH is over the specified maximum value, programming operation cannot be guaranteed.
8
HN27C101AP/AFP/ATT, HN27C301AP/AFP Series
AC Characteristics (Ta = 25C 5C, VCC = 6 V 0.25 V, VPP = 12.5 V 0.3 V) Test condition * Input pulse levels: 0.45 V to 2.4 V * Input rise and fall times: 20 ns * Reference levels for measuring timing: Inputs; 0.8 V and 2.0 V Outputs; 0.8 V and 2.0 V
Parameter Address setup time OE setup time Data setup time Address hold time Data hold time OE to output float delay VPP setup time VCC setup time PGM initial programming pulse width PGM overprogramming pulse width CE setup time Data valid from OE Symbol tAS tOES tDS tAH tDH tDF*1 tVPS tVCS tPW tOPW*2 tCES tOE Min 2 2 2 0 2 0 2 2 0.19 0.19 2 0 Typ -- -- -- -- -- -- -- -- 0.2 -- -- -- Max -- -- -- -- -- 130 -- -- 0.21 5.25 -- 150 Unit s s s s s ns s s ms ms s ns Test conditions
------------------------------------------------------------------------------------ ------------------------------------------------------------------------------------ ------------------------------------------------------------------------------------ ------------------------------------------------------------------------------------ ------------------------------------------------------------------------------------ ------------------------------------------------------------------------------------ ------------------------------------------------------------------------------------ ------------------------------------------------------------------------------------ ------------------------------------------------------------------------------------ ------------------------------------------------------------------------------------ ------------------------------------------------------------------------------------ ------------------------------------------------------------------------------------ ------------------------------------------------------------------------------------
Notes: 1. tDF is defined as the time at which the output achieves the open circuit condition and data is no longer driven. 2. Refer to the programming flowchart for tOPW.
9
HN27C101AP/AFP/ATT, HN27C301AP/AFP Series
Fast High-Reliability Programming Timing Waveform
Program Address tAS
Program Verify
tAH
Data tDS VPP VCC tVPS VCC+1 VCC tVCS
Data In Stable tDH
Data Out Valid tDF
VPP
VCC
CE
tCES
PGM tPW OE tOES tOE
10
HN27C101AP/AFP/ATT, HN27C301AP/AFP Series
Fast High-Reliability Page Programming
This device can be applied the high performance page programming algorithm shown in following flowchart. This algorithm allows to obtain faster programming time without any voltage stress to the device nor deterioration in reliability of programmed data.
START SET PAGE PROG. LATCH MODE VPP = 12.5 0.3 V, VCC = 6.0 0.25 V Address = 0 A n=0 Latch Address + 1 Address Address + 1 Address Latch Address + 1 Address B Latch Address + 1 Address Latch A NO B n+1 n NO n = 25 YES
SET PAGE PROG./ VERIFY MODE VPP = 12.5 0.3 V, VCC = 6.0 0.25 V Program tPW = 0.2 ms 5% VERIFY NOGO
GO Program tOPW = 0.2n ms LAST Address?
YES SET READ MODE VCC = 5.0 V 0.25 V, VPP = VCC READ All Address GO END FAIL NOGO
Fast High-Reliability Page Programming Flowchart
11
HN27C101AP/AFP/ATT, HN27C301AP/AFP Series
DC Characteristics (Ta = 25C 5C, VCC = 6 V 0.25 V, VPP = 12.5 V 0.3 V)
Parameter Input leakage current VPP supply current Operating VCC current Input low level Input high level Output low voltage during verify Output high voltage during verify Symbol ILI IPP ICC VIL VIH VOL VOH Min -- -- Typ -- -- Max 2 50 Unit A mA Test conditions Vin = 0 V to VCC CE = OE= VIH, PGM = VIL
------------------------------------------------------------------------------------ ------------------------------------------------------------------------------------ ------------------------------------------------------------------------------------
-- -0.1*5 2.2 -- 2.4 -- -- -- -- -- 30 0.8 mA V
------------------------------------------------------------------------------------ ------------------------------------------------------------------------------------
VCC + 0.5*6 V 0.45 -- V V IOL = 2.1 mA IOH = -400 A
------------------------------------------------------------------------------------ ------------------------------------------------------------------------------------ ------------------------------------------------------------------------------------
Notes: 1. VCC must be applied simultaneously or before VPP and removed simultaneously or after VPP. 2. VPP must not exceed 13.5 V including overshoot. 3. An influence may be had upon device reliability if the device is installed or removed while VPP = 12.5 V. 4. Do not alter VPP either VIL to 12.5 V or 12.5 V to VIL when CE = Low. 5. VIL min = -0.6 V for pulse width 20 ns 6. If VIH is over the specified maximum value, programming operation cannot be guaranteed.
12
HN27C101AP/AFP/ATT, HN27C301AP/AFP Series
AC Characteristics (Ta = 25C 5C, VCC = 6 V 0.25 V, VPP = 12.5 V 0.3 V) Test condition * Input pulse levels: 0.45 V to 2.4 V * Input rise and fall times: 20 ns * Reference levels for measuring timing: Inputs; 0.8 V and 2.0 V Outputs; 0.8 V and 2.0 V
Parameter Address setup time OE setup time Data setup time Address hold time Symbol tAS tOES tDS tAH tAHL Data hold time OE to output float delay VPP setup time VCC setup time PGM initial programming pulse width PGM overprogramming pulse width CE setup time Data valid from OE OE pulse width during data latch PGM setup time CE hold time OE hold time tDH tDF*1 tVPS tVCS tPW tOPW*2 tCES tOE tLW tPGMS tCEH tOEH Min 2 2 2 0 2 2 0 2 2 0.19 0.19 2 0 1 2 2 2 Typ -- -- -- -- -- -- -- -- -- 0.2 -- -- -- -- -- -- -- Max -- -- -- -- -- -- 130 -- -- 0.21 5.25 -- 150 -- -- -- -- Unit s s s s s s ns s s ms ms s ns s s s s
------------------------------------------------------------------------------------ ------------------------------------------------------------------------------------ ------------------------------------------------------------------------------------ ------------------------------------------------------------------------------------ -------------------------------------------------- ------------------------------------------------------------------------------------ ------------------------------------------------------------------------------------ ------------------------------------------------------------------------------------ ------------------------------------------------------------------------------------ ------------------------------------------------------------------------------------ ------------------------------------------------------------------------------------ ------------------------------------------------------------------------------------ ------------------------------------------------------------------------------------ ------------------------------------------------------------------------------------ ------------------------------------------------------------------------------------ ------------------------------------------------------------------------------------ ------------------------------------------------------------------------------------ ------------------------------------------------------------------------------------
Notes: 1. tDF is defined as the time at which the output achieves the open circuit condition and data is no longer driven. 2. Refer to the programming flowchart for tOPW.
13
HN27C101AP/AFP/ATT, HN27C301AP/AFP Series
Fast High-Reliability Page Programming Timing Waveform
Page data latch A2 to A16 tAS A0, A1 tDS Data Data in stable VPP VCC VPP VCC VCC+1 VCC tVPS tVCS tDH tAHL
Page program
program verify
tAH
tPGMS
tOE
tDF
Data out valid
tCES
tOEH
CE tCEH tPW PGM tOES OE tLW
Recommended Screening Conditions
Before mounting, please make the screening (baking without bias) shown in the right.
Program and verify by programmer
Baking at 125 to 150C for 24 to 48 hrs
Ensuring read-out
Mounting Recommended Screening Conditions
14
HN27C101AP/AFP/ATT, HN27C301AP/AFP Series
Mode Description
Device Identifier Mode The device identifier mode allows the reading out of binary codes that identify manufacturer and type of device, from outputs of OTPROM. By this HN27C101AP/AFP/ATT Identifier Code
Identifier Manufacturer code Device code A0 (12) VIL VIH A9 (26) VH VH I/O7 (21) 0 0 I/O6 (20) 0 0 I/O5 (19) 0 1 I/O4 (18) 0 1 I/O3 (17) 0 1 I/O2 (15) 1 0 I/O1 (14) 1 0 I/O0 (13) 1 0 Hex Data 07 38
mode, the device will be automatically matched its own corresponding programming algorithm, using programming equipment.
------------------------------------------------------------------------------------ ------------------------------------------------------------------------------------ ------------------------------------------------------------------------------------ HN27C301AP/AFP Identifier Code
Identifier Manufacturer code Device code A0 (12) VIL VIH A9 (26) VH VH I/O7 (21) 0 1 I/O6 (20) 0 0 I/O5 (19) 0 1 I/O4 (18) 0 1 I/O3 (17) 0 1 I/O2 (15) 1 0 I/O1 (14) 1 0 I/O0 (13) 1 1 Hex Data 07 B9
------------------------------------------------------------------------------------ ------------------------------------------------------------------------------------ ------------------------------------------------------------------------------------
Notes: 1. VH = 12.0 V 0.5 V 2. A1 - A8, A10 - A16, CE, OE = VIL, PGM = VIH
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